Messages in this thread | | | Date | Wed, 21 Dec 2016 16:10:57 -0800 | From | Stephen Boyd <> | Subject | Re: [PATCH v4 2/9] clk: stm32f4: Add PLL_I2S & PLL_SAI for STM32F429/469 boards |
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On 12/13, gabriel.fernandez@st.com wrote: > From: Gabriel Fernandez <gabriel.fernandez@st.com> > > This patch introduces PLL_I2S and PLL_SAI. > Vco clock of these PLLs can be modify by DT (only n multiplicator, > m divider is still fixed by the boot-loader). > Each PLL has 3 dividers. PLL should be off when we modify the rate. > > Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> > Acked-by: Rob Herring <robh@kernel.org> > ---
Applied to clk-stm32f4 and merged into clk-next
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