Messages in this thread | | | Date | Wed, 21 Dec 2016 16:11:02 -0800 | From | Stephen Boyd <> | Subject | Re: [PATCH v4 3/9] clk: stm32f4: Add post divisor for I2S & SAI PLLs |
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On 12/13, gabriel.fernandez@st.com wrote: > From: Gabriel Fernandez <gabriel.fernandez@st.com> > > This patch adds post dividers of I2S & SAI PLLs. > These dividers are managed by a dedicated register (RCC_DCKCFGR). > The PLL should be off before a set rate. > > Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> > ---
Applied to clk-stm32f4 and merged into clk-next
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