Messages in this thread | | | Subject | Re: [PATCH] mtd: spi-nor: add support for ESMT_f25l32qa and ESMT_f25l64qa | From | Marek Vasut <> | Date | Wed, 21 Dec 2016 04:37:14 +0100 |
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On 12/20/2016 09:41 PM, John Crispin wrote: > From: "Larry D. Pinney" <ldpinney@gmail.com> > > Add Support for the ESMT_F25L32QA and ESMT_F25L64QA > These are 4MB and 8MB SPI NOR Chips from Elite Semiconductor Memory > Technology > > Signed-off-by: John Crispin <john@phrozen.org> > Signed-off-by: Larry D. Pinney <ldpinney@gmail.com>
It looks OK:
Acked-by: Marek Vasut <marex@denx.de>
> --- > Sorry, forgot to add this to the series I sent earlier > > drivers/mtd/spi-nor/spi-nor.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c > index f9a41dc..ac4155d 100644 > --- a/drivers/mtd/spi-nor/spi-nor.c > +++ b/drivers/mtd/spi-nor/spi-nor.c > @@ -821,6 +821,8 @@ static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len) > > /* ESMT */ > { "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64, SECT_4K) }, > + { "f25l32qa", INFO(0x8c4116, 0, 64 * 1024, 64, SECT_4K) }, > + { "f25l64qa", INFO(0x8c4117, 0, 64 * 1024, 128, SECT_4K) }, > > /* Everspin */ > { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, >
-- Best regards, Marek Vasut
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