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SubjectRe: [PATCH v10 4/5] x86/cpufeature: enable RING3MWAIT for Knights Landing
Hi Grzegorz,

[auto build test WARNING on tip/x86/core]
[also build test WARNING on v4.9 next-20161216]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url: https://github.com/0day-ci/linux/commits/Grzegorz-Andrejczuk/Enabling-Ring-3-MONITOR-MWAIT-feature-for-Knights-Landing/20161217-041756
config: i386-randconfig-i1-201650 (attached as .config)
compiler: gcc-4.8 (Debian 4.8.4-1) 4.8.4
reproduce:
# save the attached .config to linux build tree
make ARCH=i386

All warnings (new ones prefixed by >>):

arch/x86/kernel/cpu/intel.c: In function 'probe_xeon_phi_r3mwait':
>> arch/x86/kernel/cpu/intel.c:93:2: warning: passing argument 2 of 'set_bit' from incompatible pointer type [enabled by default]
set_bit(HWCAP2_RING3MWAIT, &ELF_HWCAP2);
^
In file included from include/linux/bitops.h:36:0,
from include/linux/kernel.h:10,
from arch/x86/kernel/cpu/intel.c:1:
arch/x86/include/asm/bitops.h:72:1: note: expected 'volatile long unsigned int *' but argument is of type 'unsigned int *'
set_bit(long nr, volatile unsigned long *addr)
^

vim +/set_bit +93 arch/x86/kernel/cpu/intel.c

77 /*
78 * Ring 3 MONITOR/MWAIT feature cannot be detected without
79 * cpu model and family comparison.
80 */
81 if (c->x86 != 6 || c->x86_model != INTEL_FAM6_XEON_PHI_KNL)
82 return;
83
84 if (ring3mwait_disabled) {
85 msr_clear_bit(MSR_MISC_FEATURE_ENABLES,
86 MSR_MISC_FEATURE_ENABLES_RING3MWAIT_BIT);
87 return;
88 }
89
90 msr_set_bit(MSR_MISC_FEATURE_ENABLES,
91 MSR_MISC_FEATURE_ENABLES_RING3MWAIT_BIT);
92 set_cpu_cap(c, X86_FEATURE_RING3MWAIT);
> 93 set_bit(HWCAP2_RING3MWAIT, &ELF_HWCAP2);
94 }
95
96 static void early_init_intel(struct cpuinfo_x86 *c)
97 {
98 u64 misc_enable;
99
100 /* Unmask CPUID levels if masked: */
101 if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) {

---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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