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SubjectRe: [RFC 1/2] powerpc/32: Unset MSR RI in exception epilogs
On Tue, Dec 13, 2016 at 07:19:41PM +0100, Christophe Leroy wrote:
> At exception prologs, once SRR0 and SRR1 have been saved, MSR RI is
> set to mark the interrupt as recoverable.
>
> MSR RI has to be unset before writing into SRR0 and SRR1 at exception
> epilogs.

Why? What goes wrong without this? Etc.


Segher

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