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SubjectRe: [PATCH 1/6] clk: sunxi-ng: fix PLL_CPUX adjusting on A33
On Tue, Dec 13, 2016 at 11:22:47PM +0800, Icenowy Zheng wrote:
> When adjusting PLL_CPUX on A33, the PLL is temporarily driven too high,
> and the system hangs.
>
> Add a notifier to avoid this situation by temporarily switching to a
> known stable 24 MHz oscillator.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>

Applied, thanks!
Maxime

--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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