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    SubjectRe: [PATCH 1/4] x86/cpufeature: Add User-Mode Instruction Prevention definitions
    On Mon, Nov 7, 2016 at 10:12 PM, Ricardo Neri
    <ricardo.neri-calderon@linux.intel.com> wrote:
    > User-Mode Instruction Prevention (UMIP) is a security feature present in
    > new Intel Processors. If enabled, it prevents the execution of certain
    > instructions if the Current Privilege Level (CPL) is greater than 0. If
    > these instructions were executed while in CPL > 0, user space applications
    > could have access to system-wide settings such as the global and local
    > descriptor tables, the task register and the interrupt descriptor table.
    >
    > These are the instructions covered by UMIP:
    > * SGDT - Store Global Descriptor Table
    > * SIDT - Store Interrupt Descriptor Table
    > * SLDT - Store Local Descriptor Table
    > * SMSW - Store Machine Status Word
    > * STR - Store Task Register
    >
    > If any of these instructions is executed with CPL > 0, a general protection
    > exception is issued when UMIP is enbled.
    >
    > Cc: Andy Lutomirski <luto@kernel.org>
    > Cc: Andrew Morton <akpm@linux-foundation.org>
    > Cc: Borislav Petkov <bp@suse.de>
    > Cc: Brian Gerst <brgerst@gmail.com>
    > Cc: Chen Yucong <slaoub@gmail.com>
    > Cc: Chris Metcalf <cmetcalf@mellanox.com>
    > Cc: Dave Hansen <dave.hansen@linux.intel.com>
    > Cc: Fenghua Yu <fenghua.yu@intel.com>
    > Cc: Huang Rui <ray.huang@amd.com>
    > Cc: Jiri Slaby <jslaby@suse.cz>
    > Cc: Jonathan Corbet <corbet@lwn.net>
    > Cc: Michael S. Tsirkin <mst@redhat.com>
    > Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
    > Cc: Peter Zijlstra <peterz@infradead.org>
    > Cc: Ravi V. Shankar <ravi.v.shankar@intel.com>
    > Cc: Shuah Khan <shuah@kernel.org>
    > Cc: Vlastimil Babka <vbabka@suse.cz>
    > Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
    > ---
    > arch/x86/include/asm/cpufeatures.h | 1 +
    > arch/x86/include/asm/disabled-features.h | 8 +++++++-
    > arch/x86/include/uapi/asm/processor-flags.h | 2 ++
    > 3 files changed, 10 insertions(+), 1 deletion(-)
    >
    > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
    > index 5f0931b..81ef3bbe 100644
    > --- a/arch/x86/include/asm/cpufeatures.h
    > +++ b/arch/x86/include/asm/cpufeatures.h
    > @@ -282,6 +282,7 @@
    > #define X86_FEATURE_AVIC (15*32+13) /* Virtual Interrupt Controller */
    >
    > /* Intel-defined CPU features, CPUID level 0x00000007:0 (ecx), word 16 */
    > +#define X86_FEATURE_UMIP (16*32+ 2) /* User Mode Instruction Protection */
    > #define X86_FEATURE_PKU (16*32+ 3) /* Protection Keys for Userspace */
    > #define X86_FEATURE_OSPKE (16*32+ 4) /* OS Protection Keys Enable */
    >
    > diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h
    > index 85599ad..4707445 100644
    > --- a/arch/x86/include/asm/disabled-features.h
    > +++ b/arch/x86/include/asm/disabled-features.h
    > @@ -16,6 +16,12 @@
    > # define DISABLE_MPX (1<<(X86_FEATURE_MPX & 31))
    > #endif
    >
    > +#ifdef CONFIG_X86_INTEL_UMIP

    ^^^^^

    What's this?

    Let's try to do this with a minimum of configuration.

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