Messages in this thread | | | From | Mirza Krak <> | Date | Thu, 3 Nov 2016 13:30:23 +0100 | Subject | Re: [PATCH V3 1/6] clk: tegra: add TEGRA20_CLK_NOR to init table |
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2016-11-03 13:26 GMT+01:00 Mirza Krak <mirza.krak@gmail.com>: > 2016-11-03 11:06 GMT+01:00 Jon Hunter <jonathanh@nvidia.com>: >> Hi Mirza, >> >> On 27/10/16 15:01, Mirza Krak wrote: >>> >>> From: Mirza Krak <mirza.krak@gmail.com> >>> >>> Add TEGRA20_CLK_NOR to init table and set default rate to 92 MHz which >>> is max rate. >>> >>> The maximum rate value of 92 MHz is pulled from the downstream L4T >>> kernel. >> >> >> Thanks for adding this. I assume that this is from an L4T r16 release with a >> v3.1 kernel. I had a quick poke through the kernel sources for v3.1 but was >> unable to see where this is set. Obviously v3.1 did not have CCF and so >> everything seems to be in the arch/arm/mach-tegra directory for setting up >> clocks. Can you point me to the appropriate sources so I can ACK this? > > I use the kernel sources provided by Toradex, and these sources are > based on L4T r16 release. > > http://git.toradex.com/cgit/linux-toradex.git/tree/arch/arm/mach-tegra/tegra2_clocks.c?h=tegra#n2463
Ops, pre-mature send.
I also added Marcel from Toradex on CC.
The link to the source are [1] for Tegra2 and [2] for Tegra3.
[1]. http://git.toradex.com/cgit/linux-toradex.git/tree/arch/arm/mach-tegra/tegra2_clocks.c?h=tegra#n2463 [2]. http://git.toradex.com/cgit/linux-toradex.git/tree/arch/arm/mach-tegra/tegra3_clocks.c?h=tegra#n4353
Best Regards Mirza
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