Messages in this thread | | | From | Mason <> | Subject | Re: Tearing down DMA transfer setup after DMA client has finished | Date | Fri, 25 Nov 2016 15:05:05 +0100 |
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On 25/11/2016 12:57, Måns Rullgård wrote:
> The same DMA unit is also used for SATA, which is an off the shelf > Designware controller with an in-kernel driver. This interrupt timing > glitch can actually explain some intermittent errors I've observed with > it.
FWIW, newer chips embed an AHCI controller, with a dedicated memory channel.
FWIW2, the HW dev said memory channels are "almost free", and he would have no problem giving each device their own private channel read/write pair.
Regards.
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