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SubjectRe: [PATCH 01/11] hisi_sas: add v2 hw support for ECC and AXI bus fatal error
On Wed, Nov 23, 2016 at 4:59 PM, John Garry <john.garry@huawei.com> wrote:
> On 16/11/2016 01:47, Zhangfei Gao wrote:
>>
>> On Mon, Nov 7, 2016 at 8:48 PM, John Garry <john.garry@huawei.com> wrote:
>>>
>>> From: Xiang Chen <chenxiang66@hisilicon.com>

Reviewed-by: Zhangfei Gao <zhangfei.gao@linaro.org>

>>>
>>> For ECC 1bit error, logic can recover it, so we only print
>>> a warning.
>>> For ECC multi-bit and AXI bus fatal error, we panic.
>>
>>
>> Is it possible to recover via resetting phy and device etc instead of
>> panic?
>>
>> Thanks
>>
>>
>
>
> Hi Zhangfei,
>
> We are actually now working on supporting controller reset for certain
> AXI/ECC errors, so that we will not need to panic.

Got it, thanks for the info.

Thanks

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