Messages in this thread | | | Subject | Re: [PATCH] Support for perf on AMD family17h processors | From | "Natarajan, Janakarajan" <> | Date | Wed, 16 Nov 2016 14:49:29 -0600 |
| |
On 11/16/2016 12:47 PM, Borislav Petkov wrote: > On Wed, Nov 16, 2016 at 11:01:53AM -0600, Janakarajan Natarajan wrote: >> This patch enables perf core PMU support for AMD family17h processors. >> In family17h, there is no PMC-event constraint. All events, irrespective >> of the type, can be measured using any of the performance counters. >> >> Signed-off-by: Janakarajan Natarajan <Janakarajan.Natarajan@amd.com> >> --- >> arch/x86/events/amd/core.c | 15 ++++++++++++--- >> 1 file changed, 12 insertions(+), 3 deletions(-) >> >> diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c >> index f5f4b3f..849688d 100644 >> --- a/arch/x86/events/amd/core.c >> +++ b/arch/x86/events/amd/core.c >> @@ -652,7 +652,11 @@ static __initconst const struct x86_pmu amd_pmu = { >> .amd_nb_constraints = 1, >> }; >> >> -static int __init amd_core_pmu_init(void) >> +/* >> + * This function initializes core PMU to enable support >> + * for AMD Core PMC Extension. >> + */ >> +static int __init amd_core_pmc_ext_init(void) >> { >> if (!boot_cpu_has(X86_FEATURE_PERFCTR_CORE)) >> return 0; > This renaming looks pretty useless to me. So does the comment. I'll remove the renaming and comment in a v2 patch. >
| |