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    Subject[PATCH 3.16 146/346] metag: Fix __cmpxchg_u32 asm constraint for CMP
    3.16.39-rc1 review patch.  If anyone has any objections, please let me know.

    ------------------

    From: James Hogan <james.hogan@imgtec.com>

    commit 6154c187b97ee7513046bb4eb317a89f738f13ef upstream.

    The LNKGET based atomic sequence in __cmpxchg_u32 has slightly incorrect
    constraints for the return value which under certain circumstances can
    allow an address unit register to be used as the first operand of a CMP
    instruction. This isn't a valid instruction however as the encodings
    only allow a data unit to be specified. This would result in an
    assembler error like the following:

    Error: failed to assemble instruction: "CMP A0.2,D0Ar6"

    Fix by changing the constraint from "=&da" (assigned, early clobbered,
    data or address unit register) to "=&d" (data unit register only).

    The constraint for the second operand, "bd" (an op2 register where op1
    is a data unit register and the instruction supports O2R) is already
    correct assuming the first operand is a data unit register.

    Other cases of CMP in inline asm have had their constraints checked, and
    appear to all be fine.

    Fixes: 6006c0d8ce94 ("metag: Atomics, locks and bitops")
    Signed-off-by: James Hogan <james.hogan@imgtec.com>
    Cc: linux-metag@vger.kernel.org
    Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
    ---
    arch/metag/include/asm/cmpxchg_lnkget.h | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    --- a/arch/metag/include/asm/cmpxchg_lnkget.h
    +++ b/arch/metag/include/asm/cmpxchg_lnkget.h
    @@ -73,7 +73,7 @@ static inline unsigned long __cmpxchg_u3
    " DCACHE [%2], %0\n"
    #endif
    "2:\n"
    - : "=&d" (temp), "=&da" (retval)
    + : "=&d" (temp), "=&d" (retval)
    : "da" (m), "bd" (old), "da" (new)
    : "cc"
    );
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