Messages in this thread | | | Subject | Re: [PATCH v1 1/1] mfd: intel-lpss: Try to enable Memory-Write-Invalidate | From | Andy Shevchenko <> | Date | Thu, 10 Nov 2016 17:22:40 +0200 |
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On Thu, 2016-11-10 at 16:59 +0200, Mika Westerberg wrote: > On Thu, Nov 10, 2016 at 04:51:42PM +0200, Andy Shevchenko wrote: > > Enable MWI mechanism if PCI bus master supports it. > > Why?
It might be potential benefit in some cases. Documentation says that standard Memory Write might supply more current data than in the CPU modified cache line and "trashing a line in the cache may trash some data that is more current that in the memory line". This allows to avoid potential retries and other performance degradation issues on the bus. Though, I dunno how to measure it.
Would be enough to extend commit message by this paragraph?
-- Andy Shevchenko <andriy.shevchenko@linux.intel.com> Intel Finland Oy
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