Messages in this thread | | | Date | Mon, 31 Oct 2016 15:15:44 -0400 | From | Yazen Ghannam <> | Subject | Re: [PATCH v2 1/2] x86/AMD: Fix cpu_llc_id for AMD Fam17h systems |
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> > The current Fam17h cpu_llc_id derivation has an underflow bug when > ^ > (Last Level Cache ID) > > Let's write it out the first time. >
Ack.
> > > > The apicid decoding is fixed for bits 3 and above, > ^ > "is fixed ... in register... " >
Ack.
> > which give the core > > complex, node and socket IDs. The LLC is at the core complex level so we > > can find a unique cpu_llc_id by right shifting the apicid by 3. > > "... because then the LSBit will be the Core Complex ID." >
Ack.
> > We can fix the underflow bug and simplify the code by replacing the > > current cpu_llc_id derivation with a right shift. > > > > Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com> > > Cc: <stable@vger.kernel.org> # v4.4.. > > Fixes: 3849e91f571d ("x86/AMD: Fix last level cache topology for AMD Fam17h systems") > > --- > > I'll run it soon. >
Thanks, Yazen
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