Messages in this thread | | | Subject | Re: [RESEND PATCH v2] clk: hisilicon: add CRG driver for Hi3798CV200 SoC | From | Jiancheng Xue <> | Date | Fri, 28 Oct 2016 09:19:38 +0800 |
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在 2016/10/28 8:25, Stephen Boyd 写道: > On 10/27, Rob Herring wrote: >> On Fri, Oct 21, 2016 at 09:37:10AM +0800, Jiancheng Xue wrote: >>> Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset >>> Generator) module generates clock and reset signals used >>> by other module blocks on SoC. >>> >>> Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com> >>> --- >>> change log >>> v2: >>> - Fixed compiling error when compiled as a module. >>> - Fixed issues pointed by Stephen Boyd. >>> - Added prefix HISTB for clock index macro definitions. >> >> What Stephen asked for is send this and the Hi3516CV300 series as one >> series since there is a dependency. > > Exactly. Please resend both parts, along with Rob's ack on this > one. I can review it all then and hopefully Rob will be ok with > the other binding change. >
I planed to send the Hi3516CV300 patch after this patch is accepted.
It's also OK to combine them as one series. I'll resend them.
Thanks, Jiancheng
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