Messages in this thread | | | Date | Fri, 8 Jan 2016 15:41:10 -0800 | Subject | Re: [RFC 09/13] x86/mm: Disable interrupts when flushing the TLB using CR3 | From | Linus Torvalds <> |
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On Fri, Jan 8, 2016 at 3:15 PM, Andy Lutomirski <luto@kernel.org> wrote: > + /* > + * We mustn't be preempted or handle an IPI while reading and > + * writing CR3. Preemption could switch mms and switch back, and > + * an IPI could call leave_mm. Either of those could cause our > + * PCID to change asynchronously. > + */ > + raw_local_irq_save(flags); > native_write_cr3(native_read_cr3()); > + raw_local_irq_restore(flags);
This seems sad for two reasons:
- it adds unnecessary overhead on non-pcid setups (32-bit being an example of that)
- on pcid setups, wouldn't invpcid_flush_single_context() be better?
So on the whole I hate it.
Why isn't this something like
if (static_cpu_has_safe(X86_FEATURE_INVPCID)) { invpcid_flush_single_context(); return; } native_write_cr3(native_read_cr3());
*without* any flag saving crud?
And yes, that means that we'd require X86_FEATURE_INVPCID in order to use X86_FEATURE_PCID, but that seems fine.
Or is there some reason you wanted the odd flags version? If so, that should be documented.
Linus
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