Messages in this thread | | | Date | Wed, 27 Jan 2016 15:54:21 +0100 | From | Peter Zijlstra <> | Subject | Re: [RFC][PATCH] mips: Fix arch_spin_unlock() |
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On Wed, Jan 27, 2016 at 11:43:48AM +0000, Will Deacon wrote: > Do you know whether a SYNC 18 (RELEASE) followed in program order by a > SYNC 17 (ACQUIRE) creates a full barrier (i.e. something like SYNC 16)? > > If not, you may need to implement smp_mb__after_unlock_lock for RCU > to ensure globally transitive unlock->lock ordering should you decide > to relax your locking barriers.
You know that is a tricky question. Maybe its easier if you give the 3 cpu litmus test that goes with it.
Maciej, the tricky point is what, if any, effect the SYNC_RELEASE+SYNC_ACQUIRE pair has on an unrelated CPU. Please review the TRANSITIVITY section in Documentation/memory-barriers.txt and replace <general barrier> with the RELEASE+ACQUIRE pair.
We've all (Will, Paul and me) had much 'fun' trying to decipher the MIPS64r6 manual but failed to reach a conclusion on this.
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