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    Subject[PATCH 4.2 107/134] mmc: sdhci-of-esdhc: add workaround for pre divider initial value
    Date
    4.2-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Yangbo Lu <yangbo.lu@freescale.com>

    commit 77bd2f6f6c65b4ad259394d416855ed561f21e8f upstream.

    For eSDHC(version < 2.3), the pre divider only could divide base clock
    by 2 at least. Add workaround for this to avoid unexpected issue.

    Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
    Acked-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
    Fixes: bd455029d01c ("mmc: sdhci-of-esdhc: Pre divider starts at 1")
    Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/mmc/host/sdhci-of-esdhc.c | 6 ++++++
    1 file changed, 6 insertions(+)

    --- a/drivers/mmc/host/sdhci-of-esdhc.c
    +++ b/drivers/mmc/host/sdhci-of-esdhc.c
    @@ -208,6 +208,12 @@ static void esdhc_of_set_clock(struct sd
    if (clock == 0)
    return;

    + /* Workaround to start pre_div at 2 for VNN < VENDOR_V_23 */
    + temp = esdhc_readw(host, SDHCI_HOST_VERSION);
    + temp = (temp & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT;
    + if (temp < VENDOR_V_23)
    + pre_div = 2;
    +
    /* Workaround to reduce the clock frequency for p1010 esdhc */
    if (of_find_compatible_node(NULL, NULL, "fsl,p1010-esdhc")) {
    if (clock > 20000000)



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