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SubjectRe: [PATCH v2 22/25] powerpc32: move xxxxx_dcache_range() functions inline
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On Tue, 2015-09-22 at 22:57 +0200, Christophe Leroy wrote:
> Here is what I get in asm. First one is with "if (i) mb();". We see gcc
> puts a beqlr. This is the form that is closest to what we had in the
> former misc_32.S
> Second one if with "mb()". Here we get a branch to sync for a useless sync

I was more concerned with keeping the code simple than the asm output.

> c000e0ac <my_flush_dcache_range1>:
> c000e0ac: 54 63 00 36 rlwinm r3,r3,0,0,27
> c000e0b0: 38 84 00 0f addi r4,r4,15
> c000e0b4: 7d 23 20 50 subf r9,r3,r4
> c000e0b8: 55 29 e1 3f rlwinm. r9,r9,28,4,31
> c000e0bc: 4d 82 00 20 beqlr
> c000e0c0: 7d 29 03 a6 mtctr r9
> c000e0c4: 7c 00 18 6c dcbst 0,r3
> c000e0c8: 38 63 00 10 addi r3,r3,16
> c000e0cc: 42 00 ff f8 bdnz c000e0c4
> <my_flush_dcache_range1+0x18>
> c000e0d0: 7c 00 04 ac sync
> c000e0d4: 4e 80 00 20 blr
>
> c000e0d8 <my_flush_dcache_range2>:
> c000e0d8: 54 63 00 36 rlwinm r3,r3,0,0,27
> c000e0dc: 38 84 00 0f addi r4,r4,15
> c000e0e0: 7d 23 20 50 subf r9,r3,r4
> c000e0e4: 55 29 e1 3f rlwinm. r9,r9,28,4,31
> c000e0e8: 41 82 00 14 beq c000e0fc
> <my_flush_dcache_range2+0x24>
> c000e0ec: 7d 29 03 a6 mtctr r9
> c000e0f0: 7c 00 18 6c dcbst 0,r3
> c000e0f4: 38 63 00 10 addi r3,r3,16
> c000e0f8: 42 00 ff f8 bdnz c000e0f0
> <my_flush_dcache_range2+0x18>
> c000e0fc: 7c 00 04 ac sync
> c000e100: 4e 80 00 20 blr

Who cares whether the case that should rarely if ever happen gets a beqlr or a
branch to sync+blr?

-Scott



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