lkml.org 
[lkml]   [2015]   [Sep]   [1]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    /
    Date
    From
    SubjectRe: [PATCH v4 10/16] phy: Add driver for rockchip Display Port PHY
    Hi Heiko,

    在 09/02/2015 04:58 AM, Heiko Stuebner 写道:
    > Hi Yakir,
    >
    > small nit more below
    >
    > Am Dienstag, 1. September 2015, 18:51:16 schrieb Heiko Stuebner:
    >> Am Dienstag, 1. September 2015, 14:04:15 schrieb Yakir Yang:
    >>> +- clocks: from common clock binding: handle to dp clock.
    >>> + of memory mapped region.
    >>> +- clock-names: from common clock binding:
    >>> + Required elements: "sclk_dp" "sclk_dp_24m"
    >>> +
    >>> +- rockchip,grf: this soc should set GRF regs, so need get grf here.
    >>> +- #phy-cells : from the generic PHY bindings, must be 0;
    >>> +
    >>> +Example:
    >>> +
    >>> +edp_phy: phy@ff770274 {
    >> edp_phy: edp-phy {
    >>
    >>> + compatilble = "rockchip,rk3288-dp-phy";
    > typo: compatible

    Aha, thanks.

    - Yakir
    >
    >
    >




    \
     
     \ /
      Last update: 2015-09-02 04:01    [W:4.144 / U:0.316 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site