Messages in this thread | | | Subject | Re: [RFC][PATCH 2/2] crypto: caam - handle core endianness != caam endianness | From | Scott Wood <> | Date | Mon, 31 Aug 2015 19:49:51 -0500 |
| |
On Fri, 2015-08-28 at 14:50 +0300, Horia Geantă wrote: > > -#ifdef __BIG_ENDIAN > -#define wr_reg32(reg, data) out_be32(reg, data) > -#define rd_reg32(reg) in_be32(reg) > +#ifdef CONFIG_CRYPTO_DEV_FSL_CAAM_LE > +#define caam16_to_cpu(value) le16_to_cpu(value) > +#define cpu_to_caam16(value) cpu_to_le16(value) > +#define caam32_to_cpu(value) le32_to_cpu(value) > +#define cpu_to_caam32(value) cpu_to_le32(value) > +#define caam64_to_cpu(value) le64_to_cpu(value) > +#define cpu_to_caam64(value) cpu_to_le64(value)
What if we want to build a kernel that supports a chip with an LE CAAM and another chip with a BE CAAM (e.g. ls1043a plus ls2080a)? This information needs to come at runtime.
> +#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT > +#ifdef CONFIG_SOC_IMX7D
Likewise, why is there an ifdef for a particular SoC type?
-Scott
| |