Messages in this thread | | | From | Boqun Feng <> | Subject | [RFC 0/5] atomics: powerpc: implement relaxed/acquire/release variants of some atomics | Date | Fri, 28 Aug 2015 10:48:14 +0800 |
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Relaxed/acquire/release variants of atomic operations {add,sub}_return and {cmp,}xchg are introduced by commit:
"atomics: add acquire/release/relaxed variants of some atomic operations"
which is now on locking/core branch of tip tree.
By default, the generic code will implement relaxed variants as a full ordered atomic operation and release/acquire variants as a relaxed variants with a necessary general barrier before or after.
On powerpc, which has a weak memory order model, a relaxed variant can be implemented more lightweightly than a full ordered one. Further more, release and acquire variants can be implemented with arch-specific lightweight barriers.
Therefore this patchset implements the relaxed/acquire/release variants based on powerpc memory model and specific barriers. A trivial test for these new variants is also included in this series, because some of these variants are not used in kernel for now, I would like to make the code of these variants at least generated somewhere.
The patchset consists of 5 parts:
1. add trivial tests for the new variants in lib/atomic64_test.c
2. introduce arch_atomic_op_*() helpers as the arch-specific helpers to build other variants based on relaxed.
3. implement atomic{,64}_{add,sub}_return_* variants
4. implement xchg_* and atomic{,64}_xchg_* variants
5. implement cmpxchg_* atomic{,64}_cmpxchg_* variants
This patchset is based on locking/core branch of tip tree and all patches are built and boot tested for LE pseries.
Regards, Boqun
-- 2.5.0
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