| Date | Fri, 21 Aug 2015 01:18:16 +0200 | From | Peter Zijlstra <> | Subject | Re: [V3 PATCH 2/4] panic/x86: Allow cpus to save registers even if they are looping in NMI context |
| |
On Thu, Aug 06, 2015 at 02:45:43PM +0900, Hidehiro Kawai wrote: > When cpu-A panics on NMI just after cpu-B has panicked, cpu-A loops > infinitely in NMI context. Especially for x86, cpu-B issues NMI IPI > to other cpus to save their register states and do some cleanups if > kdump is enabled, but cpu-A can't handle the NMI and fails to save > register states. > > To solve thie issue, we wait for the timing of the NMI IPI, then > call the NMI handler which saves register states.
Sorry, I don't follow, what?
|