Messages in this thread | | | Date | Fri, 1 May 2015 09:18:30 +0200 | From | Ingo Molnar <> | Subject | Re: [PATCH 0/4] Enable deferred error interrupts |
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* Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> wrote:
> Newer AMD processors can generate deferred errors and can be configured > to generate APIC interrupts on such events.
What's the wider context of this? What is it good for?
I suspect it's MCE related, but only from the diffstat:
> arch/x86/kernel/cpu/mcheck/mce.c | 1 + > arch/x86/kernel/cpu/mcheck/mce_amd.c | 105 ++++++++++++++++++++++++++++++-
Please provide proper high level description for the changes.
Thanks,
Ingo
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