Messages in this thread | ![/](/images/icornerl.gif) | | Date | Wed, 01 Apr 2015 22:52:03 +0200 | From | Denys Vlasenko <> | Subject | Re: [PATCH 7/9] x86/asm/entry/32: tidy up some instructions |
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On 04/01/2015 05:50 PM, Linus Torvalds wrote: > On Wed, Apr 1, 2015 at 4:10 AM, Denys Vlasenko <dvlasenk@redhat.com> wrote: >> >> I did not know that. I was sure they are always zero extended. > > On all half-way modern cpu's they are. But on some older cpu's > (possibly just the original 386) the segment move instructions > basically are always 16-bit, and the operand size is ignored (so the > 32-bit version is just smaller and faster to decode, because it > doesn't have a 16-bit operand size prefix) > > Iirc, the same is true for the values pushed to memory on exceptions, > so the 'cs/ss' values on the exception stack may not be reliable in > the upper 16 bits. > > I don't remember if the same might be true of "pushl %Sseg". The intel > architecture manual says segment registers are zero-extended on push.
BTW, AMD64 docs do explicitly say that MOVs from segment registers to gpregs are zero-extending.
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