Messages in this thread Patch in this message | | | From | Rusty Russell <> | Subject | [PATCH 1/5] virtio: define VIRTIO_PCI_CAP_PCI_CFG in header. | Date | Fri, 6 Feb 2015 15:36:52 +1030 |
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This provides backdoor access to the device MMIOs, and every device should have one. From the virtio 1.0 spec (CS03):
4.1.4.7.1 Device Requirements: PCI configuration access capability
The device MUST present at least one VIRTIO_PCI_CAP_PCI_CFG capability.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> --- include/uapi/linux/virtio_pci.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/uapi/linux/virtio_pci.h b/include/uapi/linux/virtio_pci.h index 3b7e4d2765fb..75301468359f 100644 --- a/include/uapi/linux/virtio_pci.h +++ b/include/uapi/linux/virtio_pci.h @@ -109,8 +109,10 @@ #define VIRTIO_PCI_CAP_NOTIFY_CFG 2 /* ISR access */ #define VIRTIO_PCI_CAP_ISR_CFG 3 -/* Device specific confiuration */ +/* Device specific configuration */ #define VIRTIO_PCI_CAP_DEVICE_CFG 4 +/* PCI configuration access */ +#define VIRTIO_PCI_CAP_PCI_CFG 5 /* This is the PCI capability header: */ struct virtio_pci_cap { -- 2.1.0
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