Messages in this thread | | | Date | Thu, 3 Dec 2015 21:14:41 +0300 | From | Yury Norov <> | Subject | Re: [PATCH v6 14/19] arm64:ilp32: add sys_ilp32.c and a separate table (in entry.S) to use it |
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On Thu, Dec 03, 2015 at 05:47:08PM +0000, Catalin Marinas wrote: > On Wed, Dec 02, 2015 at 12:29:04AM +0300, Yury Norov wrote: > > My question. Why aarch64 defines COMPAT_SHMLBA as 0x4000? > > This was done to match the arch/arm value of 4 * 4K. The historical > 32-bit reason for 4 pages is to cope with aliasing VIPT caches (see > https://git.kernel.org/cgit/linux/kernel/git/tglx/history.git/commit?id=4197692eef113eeb8e3e413cc70993a5e667e5b8) > > > If there's > > no specific reason for it, it looks like a bug, and we should > > define it like in arch/arm: > > #define SHMLBA (4 * PAGE_SIZE) /* attach addr a multiple of this */ > > I guess you meant COMPAT_SHMLBA.
I citated arm code here. In aarch64 it's COMPAT_SHMLBA, of course.
> I'm not sure there is much value in > keeping 4*PAGE_SIZE for larger page sizes but I agree that the current > 16K value doesn't work well with 64K pages.
Arnd told there will be a workaround for arm v6 caches. Than this header will not be needed at all. Until that, this is simpliest fix as it doesn't affect userspace.
> > -- > Catalin
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