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    Subject[PATCH v6 1/3] doc: dt: add documentation for Mediatek spi-nor controller
    Date
    Add device tree binding documentation for serial flash with
    Mediatek serial flash controller

    Signed-off-by: Bayi Cheng <bayi.cheng@mediatek.com>
    ---
    .../devicetree/bindings/mtd/mtk-quadspi.txt | 41 ++++++++++++++++++++++
    1 file changed, 41 insertions(+)
    create mode 100644 Documentation/devicetree/bindings/mtd/mtk-quadspi.txt

    diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
    new file mode 100644
    index 0000000..866b492
    --- /dev/null
    +++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
    @@ -0,0 +1,41 @@
    +* MTD SPI nor driver for MTK MT81xx (and similar) serial flash controller
    +
    +Required properties:
    +- compatible: should be "mediatek,mt8173-nor";
    +- reg: physical base address and length of the controller's register
    +- clocks: the phandle of the clock needed by the nor controller
    +- clock-names: the name of the clocks
    + the clocks needed "spi" and "sf". "spi" is used for spi bus,
    + and "sf" is used for controller, these are the clocks witch
    + hardware needs to enabling nor flash and nor flash controller.
    + See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
    +- #address-cells: should be <1>
    +- #size-cells: should be <0>
    +
    +The SPI Flash must be a child of the nor_flash node and must have a
    +compatible property.
    +
    +Required properties:
    +- compatible: May include a device-specific string consisting of the manufacturer
    + and name of the chip. Must also include "jedec,spi-nor" for any
    + SPI NOR flash that can be identified by the JEDEC READ ID opcode (0x9F).
    +- reg : Chip-Select number
    +
    +Example:
    +
    +nor_flash: spi@1100d000 {
    + compatible = "mediatek,mt8173-nor";
    + reg = <0 0x1100d000 0 0xe0>;
    + clocks = <&pericfg CLK_PERI_SPI>,
    + <&topckgen CLK_TOP_SPINFI_IFR_SEL>;
    + clock-names = "spi", "sf";
    + #address-cells = <1>;
    + #size-cells = <0>;
    + status = "disabled";
    +
    + flash@0 {
    + compatible = "jedec,spi-nor";
    + reg = <0>;
    + };
    +};
    +
    --
    1.8.1.1.dirty


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