| From | Geert Uytterhoeven <> | Subject | [PATCH 02/25] serial: sh-sci: Update DT binding documentation for BRG support | Date | Thu, 19 Nov 2015 19:38:41 +0100 |
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Amend the DT bindings to include the optional clock sources for the Baud Rate Generator for External Clock (BRG), as found on some SCIF variants and on HSCIF.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: devicetree@vger.kernel.org --- Documentation/devicetree/bindings/serial/renesas,sci-serial.txt | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt index 8efc9b6f35637fbb..ae907e39b11c2a5a 100644 --- a/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt +++ b/Documentation/devicetree/bindings/serial/renesas,sci-serial.txt @@ -46,6 +46,12 @@ Required properties: On (H)SCI(F) and some SCIFA, an additional clock may be specified: - "hsck" for the optional external clock input (on HSCIF), - "sck" for the optional external clock input (on other variants). + On UARTs equipped with a Baud Rate Generator for External Clock (BRG) + (some SCIF and HSCIF), additional clocks may be specified: + - "int_clk" for the optional internal clock source for the frequency + divider (typically the (AXI or SHwy) bus clock), + - "scif_clk" for the optional external clock source for the frequency + divider (SCIF_CLK). Note: Each enabled SCIx UART should have an alias correctly numbered in the "aliases" node. -- 1.9.1
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