Messages in this thread | ![/](/images/icornerl.gif) | | Subject | Re: [PATCH 0/5 v2] Fix NVMe driver support on Power with 32-bit DMA | From | Benjamin Herrenschmidt <> | Date | Sat, 03 Oct 2015 07:35:09 +1000 |
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On Fri, 2015-10-02 at 14:04 -0700, Nishanth Aravamudan wrote: > Right, I did start with your advice and tried that approach, but it > turned out I was wrong about the actual issue at the time. The problem > for NVMe isn't actually the starting address alignment (which it can > handle not being aligned to the device's page size). It doesn't handle > (addr + len % dev_page_size != 0). That is, it's really a length > alignment issue. > > It seems incredibly device specific to have a an API into the DMA code > to request an end alignment -- no other device seems to have this > issue/design. If you think that's better, I can fiddle with that > instead. > > Sorry, I should have called this out better as an alternative > consideration.
Nah it's fine. Ok. Also adding the alignment requirement to the API would have been a much more complex patch since it would have had to be implemented for all archs.
I think your current solution is fine.
Cheers, Ben.
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