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    Subject[PATCH 5/5] arm: qcom: dts: Enale NAND node on IPQ8064 AP148 pplatform
    Date
    Enable the NAND controller node on the AP148 platform. Provide pinmux
    information.

    Cc: devicetree@vger.kernel.org
    Signed-off-by: Archit Taneja <architt@codeaurora.org>
    ---
    arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 32 ++++++++++++++++++++++++++++++++
    1 file changed, 32 insertions(+)

    diff --git a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
    index 1e1d0d8..82878bb 100644
    --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
    +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
    @@ -30,6 +30,28 @@
    bias-none;
    };
    };
    + nand_pins: nand_pins {
    + mux {
    + pins = "gpio34", "gpio35", "gpio36",
    + "gpio37", "gpio38", "gpio39",
    + "gpio40", "gpio41", "gpio42",
    + "gpio43", "gpio44", "gpio45",
    + "gpio46", "gpio47";
    + function = "nand";
    + drive-strength = <10>;
    + bias-disable;
    + };
    + pullups {
    + pins = "gpio39";
    + bias-pull-up;
    + };
    + hold {
    + pins = "gpio40", "gpio41", "gpio42",
    + "gpio43", "gpio44", "gpio45",
    + "gpio46", "gpio47";
    + bias-bus-hold;
    + };
    + };
    };

    gsbi@16300000 {
    @@ -93,5 +115,15 @@
    dma@18300000 {
    status = "ok";
    };
    +
    + nand@0x1ac00000 {
    + status = "ok";
    +
    + pinctrl-0 = <&nand_pins>;
    + pinctrl-names = "default";
    +
    + nand-ecc-strength = <4>;
    + nand-bus-width = <8>;
    + };
    };
    };
    --
    The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
    hosted by The Linux Foundation


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