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SubjectRe: [PATCH] i2c: rk3x: fix divisor calculation for SCL frequency
From
Addy,

On Fri, Sep 5, 2014 at 3:17 AM, addy ke <addy.ke@rock-chips.com> wrote:

> The following modifications is reasonable?
>
> static void rk3x_i2c_set_scl_rate(struct rk3x_i2c *i2c, unsigned long scl_rate)
> {
> unsigned long i2c_rate = clk_get_rate(i2c->clk);
> unsigned int div;
>
> /* set DIV = DIVH = DIVL
> * SCL rate = (clk rate) / (8 * (DIVH + 1 + DIVL + 1))
> * = (clk rate) / (16 * (DIV + 1))
> */
> div = DIV_ROUND_UP(i2c_rate, scl_rate * 16) - 1;
>
> i2c_writel(i2c, (div << 16) | (div & 0xffff), REG_CLKDIV);
> }

Yes, that looks much cleaner and is a nice solution, thanks! Can you
send up a new patch version?

-Doug


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