Messages in this thread | | | Subject | Re: [PATCH v11 06/19] irqchip: gic: Provide support for interrupt grouping | From | Catalin Marinas <> | Date | Tue, 2 Sep 2014 22:36:20 +0100 |
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On 2 Sep 2014, at 20:33, Russell King - ARM Linux <linux@arm.linux.org.uk> wrote: > On Tue, Sep 02, 2014 at 02:00:40PM +0100, Daniel Thompson wrote: >> diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c >> index 4b959e6..423707c 100644 >> --- a/drivers/irqchip/irq-gic.c >> +++ b/drivers/irqchip/irq-gic.c >> @@ -41,6 +41,9 @@ >> #include <linux/irqchip/arm-gic.h> >> >> #include <asm/cputype.h> >> +#ifdef CONFIG_FIQ >> +#include <asm/fiq.h> >> +#endif > > Is there much advantage to this ifdef over providing a dummy asm/fiq.h > in ARM64?
While it’s unlikely we’ll use FIQs on arm64 (they are generally reserved for the secure world/firmware), I don’t mind an empty asm/fiq.h file.
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