| From | Greg Kroah-Hartman <> | Subject | [PATCH 3.10 39/46] mei: me: read H_CSR after asserting reset | Date | Fri, 4 Jul 2014 15:19:43 -0700 |
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3.10-stable review patch. If anyone has any objections, please let me know.
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From: Tomas Winkler <tomas.winkler@intel.com>
commit c40765d919d25d2d44d99c4ce39e48808f137e1e upstream.
According the spec the host should read H_CSR again after asserting reset H_RST to ensure that reset was read by the firmware
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
--- drivers/misc/mei/hw-me.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-)
--- a/drivers/misc/mei/hw-me.c +++ b/drivers/misc/mei/hw-me.c @@ -186,7 +186,19 @@ static void mei_me_hw_reset(struct mei_d dev->recvd_hw_ready = false; mei_me_reg_write(hw, H_CSR, hcsr); - if (dev->dev_state == MEI_DEV_POWER_DOWN) + /* + * Host reads the H_CSR once to ensure that the + * posted write to H_CSR completes. + */ + hcsr = mei_hcsr_read(hw); + + if ((hcsr & H_RST) == 0) + dev_warn(&dev->pdev->dev, "H_RST is not set = 0x%08X", hcsr); + + if ((hcsr & H_RDY) == H_RDY) + dev_warn(&dev->pdev->dev, "H_RDY is not cleared 0x%08X", hcsr); + + if (intr_enable == false) mei_me_hw_reset_release(dev); dev_dbg(&dev->pdev->dev, "current HCSR = 0x%08x.\n", mei_hcsr_read(hw));
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