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SubjectRE: [Patch v7 2/3] usb: phy: Add Qualcomm DWC3 HS/SS PHY drivers
From
Hi,

On Mon, Jun 30, 2014 at 9:33 PM, Andy Gross <agross@codeaurora.org> wrote:
> From: "Ivan T. Ivanov" <iivanov@mm-sol.com>
>
> These drivers handles control and configuration of the HS
> and SS USB PHY transceivers. They are part of the driver
.
[snip]
.
> +#include <linux/usb/phy.h>
> +
> +/**
> + * USB QSCRATCH Hardware registers
> + */

unused define, can you please remove it

> +#define QSCRATCH_CTRL_REG (0x04)
> +#define QSCRATCH_GENERAL_CFG (0x08)
> +#define PHY_CTRL_REG (0x10)
> +#define PARAMETER_OVERRIDE_X_REG (0x14)

ditto

> +#define CHARGING_DET_CTRL_REG (0x18)

ditto

> +#define CHARGING_DET_OUTPUT_REG (0x1c)

ditto

> +#define ALT_INTERRUPT_EN_REG (0x20)

ditto

> +#define PHY_IRQ_STAT_REG (0x24)

ditto

> +#define CGCTL_REG (0x28)
> +
> +#define PHY_3P3_VOL_MIN 3050000 /* uV */
> +#define PHY_3P3_VOL_MAX 3300000 /* uV */
> +#define PHY_3P3_HPM_LOAD 16000 /* uA */
> +
.
[snip]
.
> +MODULE_ALIAS("platform:qcom-dwc3-ssphy");
> +MODULE_LICENSE("GPL v2");
> +MODULE_DESCRIPTION("DesignWare USB3 QCOM SSPHY driver");
> --
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Regards,
Kiran Padwal




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