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Subject[PATCH v2 03/11] ARM: stih416: Add DT nodes for PWM
Date
Supply top level nodes for the STiH416 based development boards.
The Pinctrl configuration has already been applied, so the only
missing piece of the DT puzzle is for a board's DTB to enable
the nodes.

Signed-off-by: Ajit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
arch/arm/boot/dts/stih416.dtsi | 44 +++++++++++++++++++++++++++++++++++++++++-
1 file changed, 43 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi
index 84758d7..c28ef85 100644
--- a/arch/arm/boot/dts/stih416.dtsi
+++ b/arch/arm/boot/dts/stih416.dtsi
@@ -102,7 +102,7 @@
interrupts = <0 210 0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sbc_serial1>;
- clocks = <&clk_sysin>;
+ clocks = <&clk_sysin>;
};

i2c@fed40000 {
@@ -236,5 +236,47 @@
resets = <&powerdown STIH416_KEYSCAN_POWERDOWN>,
<&softreset STIH416_KEYSCAN_SOFTRESET>;
};
+
+ /* SAS PWM Module */
+ pwm0: pwm@fed10000 {
+ compatible = "st,sti-pwm";
+ status = "disabled";
+ #pwm-cells = <2>;
+ reg = <0xfed10000 0x68>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm0_chan0_default
+ &pinctrl_pwm0_chan1_default
+ &pinctrl_pwm0_chan2_default
+ &pinctrl_pwm0_chan3_default>;
+
+ clock-names = "pwm";
+ clocks = <&clk_sysin>;
+ st,pwm-num-chan = <4>;
+ };
+
+ /* SBC PWM Module */
+ pwm1: pwm@fe510000 {
+ compatible = "st,sti-pwm";
+ status = "disabled";
+ #pwm-cells = <2>;
+ reg = <0xfe510000 0x68>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm1_chan0_default
+ /*
+ * Shared with SBC_OBS_NOTRST. Don't
+ * enable unless you really know what
+ * you're doing.
+ *
+ * &pinctrl_pwm1_chan1_default
+ */
+ &pinctrl_pwm1_chan2_default
+ &pinctrl_pwm1_chan3_default>;
+
+ clock-names = "pwm";
+ clocks = <&clk_sysin>;
+ st,pwm-num-chan = <3>;
+ };
};
};
--
1.8.3.2


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