Messages in this thread | | | Date | Fri, 11 Jul 2014 18:11:41 +0300 | From | Tuomas Tynkkynen <> | Subject | Re: [PATCH 12/13] cpufreq: Add cpufreq driver for Tegra124 |
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On 11/07/14 17:57, Thierry Reding wrote:
>> I don't think that's going to work? The voltage scaling is handled in hw. > > Do we have to handle it in hardware or can we opt to do it in software, > too? >
With the PLLX, voltage scaling is done entirely in SW. With the DFLL, it's possible to stay in open-loop mode and do it in SW, but there's not much point in that.
-- nvpublic
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