Messages in this thread | | | From | "" <> | Subject | RE: [PATCH v3] ARM: ls1021a: add gating clocks to IP blocks. | Date | Thu, 16 Oct 2014 02:30:31 +0000 |
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Hi Shawn,
[...] > > + DCFG_CCSR_DEVDISR1, > > + ls1021a_clk_shift(0)); > > I think we can ignore the 80 columns warning and put these on one line > to make the code a bit easier to read. >
Yes, it looks better, but in the FSL's internal Gerrit it will be a little Harder to merge this patch in SDK, the Jenkins will check this and then return failure.
Thanks,
BRs Xiubo
> > + clks[LS1021A_CLK_ESDHC_EN] = ls1021a_clk_gate("esdhc_en", "dummy", > > + DCFG_CCSR_DEVDISR1, > > + ls1021a_clk_shift(2)); [...]
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