Messages in this thread | | | Date | Fri, 20 Sep 2013 16:45:18 +0100 | From | Will Deacon <> | Subject | Re: [PATCH] lockref: use cmpxchg64 explicitly for lockless updates |
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On Fri, Sep 20, 2013 at 11:08:06AM +0100, Will Deacon wrote: > On Thu, Sep 19, 2013 at 07:11:32PM +0100, Linus Torvalds wrote: > > From a performance standpoint, lockref really is expected to mainly > > help with big machines. Only insane people would do big machines with > > 32-bit kernels these days. > > Our definitions of "big" machines probably differ significantly, but it > would be interesting to see if this *does* make a difference on some of the > multi-cluster ARMv7 hardware.
[...]
> > In other words, I'd actually like to see some numbers if there are > > loads where this actually helps and matters... > > That's fair enough; I just saw the new lockref stuff, thought "that's a cool > hack" then looked at playing with it on ARM. I'll go see what this AIM7 > thing is all about...
Right, turns out I can get some interesting numbers from your simple t.c program on my dual-cluster, 5 CPU ARMv7 machine. The new cmpxchg-based lockref code gives ~50% improvement, but the fun part is that implementing cmpxchg64 without memory barriers doubles this win to ~100% over current mainline.
If we can guarantee that the CODE just messes around with the lockref, those barriers probably aren't needed...
As for AIM7/re-aim, I'm having a hard time getting repeatable numbers out of it to establish a baseline, so it's not proving to be especially helpful.
Will
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