Messages in this thread | | | Date | Wed, 05 Jun 2013 10:25:24 -0600 | From | Stephen Warren <> | Subject | Re: [PATCH 0/2] PLL m,n,p init from SoC files |
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On 06/05/2013 07:51 AM, Peter De Schrijver wrote: > The m,n,p fields don't have the same bit offset and width across all PLLs. > This patchset allows SoC specific files to indicate the offset and width. > It also provides the data for Tegra114.
The series, Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
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