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    SubjectRe: [PATCH 2/2] perf, amd: support for AMD NB and L2I "uncore" counters.
    On Fri, Apr 19, 2013 at 02:27:16PM +0200, Peter Zijlstra wrote:
    > On Thu, 2013-04-18 at 11:33 -0500, Jacob Shin wrote:
    >
    > > Okay, here is V2 which does that. Thanks again in advance for taking
    > > the time to look it over.
    >
    > Awesome, looks good on a first read.. I'm assuming you've tested things
    > and they actually work too? :-)

    Yes of course, tested on:
    1. Older families without these new counters to make sure there is no
    regression.
    2. Family 15h, only has NB counters
    3. Family 16h, has both NB and L2 counters

    >
    > > From d68225744196d8b0d60a1bc33ae9abdbffbd9bc9 Mon Sep 17 00:00:00 2001
    > > From: Jacob Shin <jacob.shin@amd.com>
    > > Date: Sun, 14 Apr 2013 04:12:42 -0500
    > > Subject: [PATCH 2/2] perf, amd: support for AMD NB and L2I "uncore" counters.
    > >
    > > Add support for AMD Family 15h [and above] northbridge performance
    > > counters. MSRs 0xc0010240 ~ 0xc0010247 are shared across all cores
    > > that share a common northbridge.
    > >
    > > Add support for AMD Family 16h L2 performance counters. MSRs
    > > 0xc0010230 ~ 0xc0010237 are shared across all cores that share a
    > > common L2 cache.
    > >
    > > We do not enable counter overflow interrupts. Sampling mode and
    > > per-thread events are not supported.
    > >
    > > Signed-off-by: Jacob Shin <jacob.shin@amd.com>
    >
    > Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>

    Thank you again, for taking the time.

    Ingo, I hope it's not too late to make it into perf/core for 3.10.

    Thanks,

    -Jacob



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