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    SubjectRe: perf events ring buffer memory barrier on powerpc
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    Peter Zijlstra <peterz@infradead.org> wrote on 10/25/2013 07:37:49 PM:

    > I would argue for:
    >
    > READ ->data_tail READ ->data_head
    > smp_rmb() (A) smp_rmb() (C)
    > WRITE $data READ $data
    > smp_wmb() (B) smp_mb() (D)
    > STORE ->data_head WRITE ->data_tail
    >
    > Where A pairs with D, and B pairs with C.

    1. I agree. My only concern is that architectures which do use atomic
    operations
    with memory barriers, will issue two consecutive barriers now, which is
    sub-optimal.

    2. I think the comment in "include/linux/perf_event.h" describing
    "data_head" and
    "data_tail" for user space need an update as well. Current version -

    /*
    * Control data for the mmap() data buffer.
    *
    * User-space reading the @data_head value should issue an rmb(),
    on
    * SMP capable platforms, after reading this value -- see
    * perf_event_wakeup().
    *
    * When the mapping is PROT_WRITE the @data_tail value should be
    * written by userspace to reflect the last read data. In this case
    * the kernel will not over-write unread data.
    */
    __u64 data_head; /* head in the data section */
    __u64 data_tail; /* user-space written tail */

    - say nothing about the need of memory barrier before "data_tail" write.

    -- Victor




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