Messages in this thread | | | Subject | Re: 20% performance drop on PostgreSQL 9.2 from kernel 3.5.3 to 3.6-rc5 on AMD chipsets - bisected | From | Peter Zijlstra <> | Date | Tue, 25 Sep 2012 13:58:06 +0200 |
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On Mon, 2012-09-24 at 19:11 -0700, Linus Torvalds wrote: > In the not-so-distant past, we had the intel "Dunnington" Xeon, which > was iirc basically three Core 2 duo's bolted together (ie three > clusters of two cores sharing L2, and a fully shared L3). So that was > a true multi-core with fairly big shared L2, and it really would be > sad to not use the second core aggressively.
Ah indeed. My Core2Quad didn't have an L3 afaik (its sitting around without a PSU atm so checking gets a little hard) so the LLC level was the L2 and all worked out right (it also not having SMT helped of course).
But if there was a Xeon chip that did add a package L3 then yes, all this would become more interesting still. We'd need to extend the scheduler topology a bit as well, I don't think it can currently handle this well.
So I guess we get to do some work for steamroller.
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