Messages in this thread | | | Date | Thu, 09 Aug 2012 08:18:38 -0700 | From | "H. Peter Anvin" <> | Subject | Re: [PATCH, RFC 0/6] Avoid cache trashing on clearing huge/gigantic page |
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On 07/20/2012 05:50 AM, Kirill A. Shutemov wrote: > From: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> > > Clearing a 2MB huge page will typically blow away several levels of CPU > caches. To avoid this only cache clear the 4K area around the fault > address and use a cache avoiding clears for the rest of the 2MB area. > > It would be nice to test the patchset with more workloads. Especially if > you see performance regression with THP. > > Any feedback is appreciated. > > Andi Kleen (6): > THP: Use real address for NUMA policy > mm: make clear_huge_page tolerate non aligned address > THP: Pass real, not rounded, address to clear_huge_page > x86: Add clear_page_nocache > mm: make clear_huge_page cache clear only around the fault address > x86: switch the 64bit uncached page clear to SSE/AVX v2 >
This is a mix of x86-specific and generic changes... does anyone mind if I put this into the -tip tree?
-hpa
-- H. Peter Anvin, Intel Open Source Technology Center I work for Intel. I don't speak on their behalf.
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