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    Subject[ 08/46] drm/i915: prefer wide & slow to fast & narrow in DP configs
    Date
    From: Greg KH <gregkh@linuxfoundation.org>

    3.5-stable review patch. If anyone has any objections, please let me know.

    ------------------

    From: Jesse Barnes <jbarnes@virtuousgeek.org>

    commit 2514bc510d0c3aadcc5204056bb440fa36845147 upstream.

    High frequency link configurations have the potential to cause trouble
    with long and/or cheap cables, so prefer slow and wide configurations
    instead. This patch has the potential to cause trouble for eDP
    configurations that lie about available lanes, so if we run into that we
    can make it conditional on eDP.

    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45801
    Tested-by: peter@colberg.org
    Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
    Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
    Cc: Jonathan Nieder <jrnieder@gmail.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/gpu/drm/i915/intel_dp.c | 4 ++--
    1 file changed, 2 insertions(+), 2 deletions(-)

    --- a/drivers/gpu/drm/i915/intel_dp.c
    +++ b/drivers/gpu/drm/i915/intel_dp.c
    @@ -726,8 +726,8 @@ intel_dp_mode_fixup(struct drm_encoder *
    bpp = adjusted_mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24;
    mode_rate = intel_dp_link_required(mode->clock, bpp);

    - for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
    - for (clock = 0; clock <= max_clock; clock++) {
    + for (clock = 0; clock <= max_clock; clock++) {
    + for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
    int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);

    if (mode_rate <= link_avail) {



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