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    SubjectRe: [PATCH 1/3] PCI: allow P2P bridge windows starting at PCI bus address zero
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    On Mon, Jul 9, 2012 at 1:32 PM, Bjorn Helgaas <bhelgaas@google.com> wrote:
    > cd81e1ea1a4c added checks that prevent us from using P2P bridge windows
    > that start at PCI bus address zero. The reason was to "prevent us from
    > overwriting resources that are unassigned."
    >
    > But generic code should allow address zero in both BARs and bridge
    > windows, so I think that commit was a mistake.
    >
    > Windows at bus address zero are legal and likely to exist on machines with
    > an offset between bus addresses and CPU addresses. For example, in the
    > following hypothetical scenario, the bridge at 00:01.0 has a window at bus
    > address zero and the device at 01:00.0 has a BAR at bus address zero, and
    > I think both are perfectly valid:
    >
    > PCI host bridge to bus 0000:00
    > pci_bus 0000:00: root bus resource [mem 0x100000000-0x1ffffffff] (bus address [0x00000000-0xffffffff])
    > pci 0000:00:01.0: PCI bridge to [bus 01]
    > pci 0000:00:01.0: bridge window [mem 0x100000000-0x100ffffff]
    > pci 0000:01:00.0: reg 10: [mem 0x100000000-0x100ffffff]
    >
    > CC: Yinghai Lu <yinghai@kernel.org>
    > Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

    Acked-by: Yinghai Lu <yinghai@kernel.org>


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