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SubjectRe: [PATCH 2/4] perf/x86: Fix format definition of SNB-EP uncore QPI box
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On Mon, Jul 23, 2012 at 8:23 AM, Yan, Zheng <zheng.z.yan@intel.com> wrote:
> From: "Yan, Zheng" <zheng.z.yan@intel.com>
>
> The event control register of SNB-EP uncore QPI box has a one bit
> extension at bit position 21.
>
> Reported-by: Stephane Eranian <eranian@google.com>
> Signed-off-by: Yan, Zheng <zheng.z.yan@intel.com>
> ---
> arch/x86/kernel/cpu/perf_event_intel_uncore.c | 23 ++++++++++++++++++++++-
> arch/x86/kernel/cpu/perf_event_intel_uncore.h | 4 ++++
> 2 files changed, 26 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
> index a5de59f..305e603 100644
> --- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c
> +++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
> @@ -21,6 +21,7 @@ DEFINE_UNCORE_FORMAT_ATTR(event, event, "config:0-7");
> DEFINE_UNCORE_FORMAT_ATTR(umask, umask, "config:8-15");
> DEFINE_UNCORE_FORMAT_ATTR(edge, edge, "config:18");
> DEFINE_UNCORE_FORMAT_ATTR(tid_en, tid_en, "config:19");
> +DEFINE_UNCORE_FORMAT_ATTR(ev_sel_ext, ev_sel_ext, "config:21");

I would not have done it that way. I would have done:

DEFINE_UNCORE_FORMAT_ATTR(event, event, "config:0-7,21");

Assuming the event parser supports disjoint bits. For QPI, I think
the event code is actually 9 bits wide. I will check on this some more.


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