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    SubjectRe: [PATCH] gpio: samsung: Fix off-by-one bug in gpio addresses
    From
    Acked-by: Doug Anderson <dianders@chromium.org>

    ---

    On Fri, Jul 20, 2012 at 1:58 PM, Sean Paul <seanpaul@chromium.org> wrote:
    >
    > Move gpc4 to the end of the automatically processed gpio controllers so
    > we don't taint the automatic offset calculation.
    >
    > This bug caused all controllers coming after gpc4 to map to the
    > incorrect address. The result is <&gpd1 0 0 0 0> would actually map to
    > GPIO 0 in gpd0.
    >
    > Signed-off-by: Sean Paul <seanpaul@chromium.org>
    > ---
    > drivers/gpio/gpio-samsung.c | 14 +++++++-------
    > 1 files changed, 7 insertions(+), 7 deletions(-)
    >
    > diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
    > index b6453d0..e4599b4 100644
    > --- a/drivers/gpio/gpio-samsung.c
    > +++ b/drivers/gpio/gpio-samsung.c
    > @@ -2454,12 +2454,6 @@ static struct samsung_gpio_chip exynos5_gpios_1[] = {
    > },
    > }, {
    > .chip = {
    > - .base = EXYNOS5_GPC4(0),
    > - .ngpio = EXYNOS5_GPIO_C4_NR,
    > - .label = "GPC4",
    > - },
    > - }, {
    > - .chip = {
    > .base = EXYNOS5_GPD0(0),
    > .ngpio = EXYNOS5_GPIO_D0_NR,
    > .label = "GPD0",
    > @@ -2513,6 +2507,12 @@ static struct samsung_gpio_chip exynos5_gpios_1[] = {
    > .label = "GPY6",
    > },
    > }, {
    > + .chip = {
    > + .base = EXYNOS5_GPC4(0),
    > + .ngpio = EXYNOS5_GPIO_C4_NR,
    > + .label = "GPC4",
    > + },
    > + }, {
    > .config = &samsung_gpio_cfgs[9],
    > .irq_base = IRQ_EINT(0),
    > .chip = {
    > @@ -2833,7 +2833,7 @@ static __init void exynos5_gpiolib_init(void)
    > }
    >
    > /* need to set base address for gpc4 */
    > - exynos5_gpios_1[11].base = gpio_base1 + 0x2E0;
    > + exynos5_gpios_1[20].base = gpio_base1 + 0x2E0;
    >
    > /* need to set base address for gpx */
    > chip = &exynos5_gpios_1[21];
    > --
    > 1.7.7.3
    >


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