Messages in this thread | | | Date | Fri, 13 Jul 2012 11:09:02 +0530 | From | Laxman Dewangan <> | Subject | Re: [PATCH 2/2] dma: tegra: fix residual calculation for cyclic case |
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On Friday 13 July 2012 08:45 AM, Vinod Koul wrote: > On Mon, 2012-07-02 at 10:02 -0600, Stephen Warren wrote: >> On 07/02/2012 02:22 AM, Laxman Dewangan wrote: >>> In cyclic mode of DMA, the byte transferred can be more >>> than the requested size and in this case, calculating >>> residuals based on the current position of DMA transfer to >>> bytes requested i.e. bytes required to transfer to reach >>> bytes requested from current DMA position. >>> >>> Signed-off-by: Laxman Dewangan<ldewangan@nvidia.com> >> This makes sense to me, although I wonder if details like this aren't >> something that the dmaengine core should be handling. > No core doesn't know anything about the how much you are transferring > and where you are. That is the driver to calculate and provide.
Just for confirmation, are you going to apply this patch or do I need to do anything here.
Thanks, Laxman
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