Messages in this thread | | | Date | Fri, 8 Jun 2012 18:44:59 +0200 | From | Andi Kleen <> | Subject | Re: [PATCH 1/2] perf, x86: Add basic Ivy Bridge support |
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On Fri, Jun 08, 2012 at 09:42:42AM +0200, Stephane Eranian wrote: > Also IVB needs its own pebs_constraint table as there is a new PEBS > event (0xd3):
Ok. Will add.
-Andi
> > +struct event_constraint intel_ivb_pebs_event_constraints[] = { > + INTEL_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.ALL */ > + INTEL_EVENT_CONSTRAINT(0xc2, 0xf), /* UOPS_RETIRED.* */ > + INTEL_EVENT_CONSTRAINT(0xc4, 0xf), /* BR_INST_RETIRED.* */ > + INTEL_EVENT_CONSTRAINT(0xc5, 0xf), /* BR_MISP_RETIRED.* */ > + INTEL_EVENT_CONSTRAINT(0xcd, 0x8), /* MEM_TRANS_RETIRED.* */ > + INTEL_EVENT_CONSTRAINT(0xd0, 0xf), /* MEM_UOP_RETIRED.* */ > + INTEL_EVENT_CONSTRAINT(0xd1, 0xf), /* MEM_LOAD_UOPS_RETIRED.* */ > + INTEL_EVENT_CONSTRAINT(0xd2, 0xf), /* > MEM_LOAD_UOPS_LLC_HIT_RETIRED.* */ > + INTEL_EVENT_CONSTRAINT(0xd3, 0xf), /* > MEM_LOAD_UOPS_LLC_MISS.LOCAL_DRAM */ > + EVENT_CONSTRAINT_END > +}; > +
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